1. Field of the Invention
The present invention relates to thin-film transistors, semiconductor devices having dynamic memory cells using hollow post shape channel thin-film transistors and methods of manufacture thereof.
2. Description of the Related Art
The packing density of memory cells in dynamic random access memories (DRAMs) has been increased by a factor of four every three years. Nowadays 256 M-bit and 1 G-bit memory cell structures are proposed. An example is found in an article entitled "A Surrounding Gate Transistor (SGT) Cell for 64/256Mbit DRAM", International Electron Devices Meeting (IEDM) 1989 Technical Digest, pp 23-26. The memory cell described in the article is what is referred to as a crosspoint type cell, in which a vertical transfer gate is formed by forming a capacitor in the lower portion of a silicon post and forming a word line to surround the upper portion of the silicon post, and a bit line is formed on the uppermost portion of the silicon post so that it is orthogonal to the word line.
However, the memory cell with the structure as described above suffers from problems that, since there is a need of etching a silicon substrate to form a silicon post, its manufacturing process is complex and moreover a great number of steps are required, making its manufacturing cost high and its manufacturing yield low.